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UCIe-S PHY and Controller

Our silicon proven UCIE-S Interconnect IP Solutions, offer industry-leading power efficiency, performance, and low latency, tailored for the next generation of consumer electronics, automotive, high-performance computing, AI, and data center applications.

 

Key Features

 

l  Supports MCM, BGA packages and Chiplet2Chiplet interconnects on PCB

 

l  Available process nodes: 28, 22, 16, 12, 7, 6nm

 

l  X16 and X32 PHY with bump maps defined in UCIe 2.0 specifications

 

l  Industry leading power consumption

 

l  Supports speeds: (Depends on channel insertion loss)

 

o    Grand L: 4, 8, 12 and 16Gbps

o    Grand H: 24 and 32Gbps

 

l  Extreme low End-to-end Latency

 

l  Patented voltage and Temperature Adaptive receiver to compensate voltage and temperature changes during transmission, result in zero or extreme low BER (Bit-Error-Rate).

 

l  Real-time per lane data-eye monitor to monitor the health of each lane real time

 

l  UCIe Controller supports all UCIe defined interfaces, AXI and CXS.

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